In the evolution of integrated circuits (ICs), the maximum number of devices per chip has steadily increased. The functional density (the number of interconnected devices per chip area) is dependent on how effectively these devices can be interconnected. As the number of devices that can be interconnected on the chip surface is limited, multilevel interconnection system have been employed to continually increase the functional density. Patterned aluminum thin films -are the most widely used interconnect structures in the manufacture of silicon ICs. Aluminum, however, oxidizes in ambient temperature and the resultant aluminum oxide acts as an insulator, increasing the contact resistance (R.sub.c) when another metal layer is deposited. Similarly, contaminants deposited in the contact openings and vias from prior processes also contribute to increasing the R.sub.c when additional metal layers are added. With the ever-increasing layers, the R.sub.c accumulates and may affect the performance of the Ics. To alleviate the problems associated with the metal/metal contacts, back-sputtering is commonly used to remove residual oxides and contaminants formed and deposited on the contact metal surface resulting from previous fabrication processes.
As is well known, sputtering is a physical vapor deposition (PVD) mechanism that involves ionization of argon gas at a low pressure through the use of an electric field. Positive argon ions are accelerated into a negatively charged plate called the target. When these ions strike the target plate, atoms of the target material are sputtered off and then recondense on ambient surfaces to form thin films. Other basic modes of sputtering includes DC magnetron, RF magnetron, RF diode and RF triode. The DC magnetron mode of sputtering has been the most popular method of depositing aluminum since the late 1970's. However, by using RF power instead of DC, target materials that are not conductors may be deposited. RF energy is applied to the back surface of the target and is capacitively coupled to the front surface. The difference in mobility between the electrons and ions in the RF formed plasma causes the surface of the insulating target to acquire a net negative charge resulting in a large -vc self bias voltage. The magnitude of this bias increases with the in/out RF power. Positively charged argon ions in the plasma are accelerated to the surface of the target causing sputtering to occur.
In the back-sputtering process, the silicon wafer acts as the target and is bombarded with argon ions and these ions sputter any insulating layers that are present on the metal surface. The process removes metal oxides such as aluminum oxides or other contaminants, such as etch polymer atoms, leaving a "clean" metal surface for subsequent metal deposition. Previously, with technologies larger than 0.5 .mu.m, a back-sputter process of 250 W was used to remove native oxides. However, as technologies shrink and gate oxides become thinner, larger wattages are necessary to remove the oxides. Unfortunatley, these high power processes can cause gate oxide damage and thus a lower RF back-sputter power is preferred. Moreover, as feature sizes are scaled into the half and sub-half micron regime, the aspect ratio of the contact opening or via also increases. In order for the interlevel parasitic capacitance of the interconnections to the underlying and overlying metallization lines to be maintained, or even reduced, the thickness of the dielectric layers in which the contact openings or vias are formed may not be decreased. Therefore, in technologies less than 0.5 .mu.m, there is a substantial decrease in the width of the contact opening or via, while its depth stays essentially the same, resulting in a lager aspect ratio and a much narrower contact opening or via.
With the current 0.5 .mu.m and 0.35 .mu.m CMOS processes, a lower back-sputter power of 250 W does not adequately reduce the metal-to-metal contact resistance. The 250 W RF power is insufficient because of the larger aspect ratio of the contact openings or vias. A common solution used to improve the contact resistance is to increase the RF power during the back-sputtering process to overcome the larger depth of the contact openings or vias. To obtain comparable results with the prior 250 W RF back-sputtering process, the RF power has to be increased to about 500 W. As mentioned earlier, increasing the RF power, however, results in the semiconductor devices being exposed to an increased plasma damage. With the current trend of reducing the width and thickness of the gate oxides, the failures due to the higher plasma energy will increase, resulting in lower yields and reduced product reliability.
Therefore, there is a need in the art for improved methods and processes for the removal of oxides and contaminants at reduced RF power.